| Model | Form Factor | Function | Intelligence | I/O Lines | Memory | Miscellaneous | Front Connector | Isolation | Operating Range |
|---|---|---|---|---|---|---|---|---|---|
| TXMC635 | XMC | Reconfigurable FPGA with 48 x TTL IO 32 x 16 bit Analog In / 8 x 16 bit Analog Out |
Xilinx XC6SLX100T-2 Spartan6 FPGA/ Xilinx XC6SLX45T-2 Spartan6 FPGA | 64 FPGA I/Os lines on P14 and 3 FPGA Multi-Gigabit-Transceiver on P16. | 128 MB DDR3 SDRAM | IPMI resource: FRU hardware definition information stored in on-board EEPROM | VHD100 Connector | 48 ESD-protected TTL lines | Operating temperature -40°C to +85°C |
| TXMC633 | XMC | Reconfigurable FPGA with 64 TTL I/O / 32 Diff. I/O | TXMC633-1xR: Xilinx XC6SLX45T-2 Spartan6 FPGA configured by serial Flash TXMC633-2xR: Xilinx XC6SLX100T-2 Spartan6 | 64 TTL I/O / 32 Diff. I/O | 128 MB DDR3 SDRAM | IPMI resource: FRU hardware definition information stored in on-board EEPROM | HD68 Connector | ESD-protected TTL lines | Operating temperature -40°C to +85°C |
| XMC-7A200 | XMC | User-Configurable Artix-7 FPGA Modules with Plug-In I/O | Xilinx Artix -7 FPGA | 17 LVDS Pairs, 2 Global Clock Pairs on P16 / 30 LVDS Pairs, 2 Global Clock Pairs on P4 / x4 / x8 on P15 | 128M x 64-bit DDR3 SDRAM | Acromag’s Engineering Design Kit provides VHDL code to get running quickly. JTAG interface enables on-board debugging. Maximize FPGA performance with Vivado or ISE Design Suite. |
AXM modules AVAILABLE for additional I/O lines | See Acromag AXM modules for options | Operating temperature -40°C to +55°C |
| TPMC634 | PMC | PMC Module with High-Density User-Programmable FPGA | Xilinx XC6SLX25 Spartan-6 | 64 TTL I/O (-10R) • 32 differential I/O RS422/485 (-11R) • 32 TTL I/O and 16 diff. I/O RS422/485 (-12R) • 32 differential I/O M-LVDS (-13R) • 32 TTL I/O and 16 diff. I/O M-LVDS (-14R) |
– | in-system-programmable via the PCI bus. An on-board JTAG header provides access to the user FPGA JTAG port. | 1 X HD68 Front Connector and P14 Rear Connector | – | Operating temperature -40°C to +85°C |
| XMC-7K410CC-LF | XMC | User-Configurable Conduction-Cooled Kintex-7 FPGA Modules | Kintex-7 FPGA with 410k | Rear high-speed I/O 16 high-speed serial lanes. Rear user I/O P16: 17 LVDS pairs (34 LVCMOS), 2 global clock pairs. P4: 30 LVDS pairs (60 LVCMOS), 2 global clock pairs. | 128M x 64-bit DDR3 SDRAM | 8-lane high-speed serial interface on rear P15 connector for PCIe Gen 1/2 (standard), Serial RapidI/O, 10Gb Ethernet, Xilinx Aurora | – | Depending on USM | Operating temperature -40°C to +70°C Conduction Cooled |
| XMC-7K325AX-LF | XMC | User-Configurable Conduction-Cooled Kintex-7 FPGA Modules | Kintex-7 FPGA with 325k | Rear high-speed I/O 16 high-speed serial lanes. Rear user I/O P16: 17 LVDS pairs (34 LVCMOS), 2 global clock pairs. P4: 30 LVDS pairs (60 LVCMOS), 2 global clock pairs. | 128M x 64-bit DDR3 SDRAM | 8-lane high-speed serial interface on rear P15 connector for PCIe Gen 1/2 (standard), Serial RapidI/O, 10Gb Ethernet, Xilinx Aurora | – | Depending on USM | Operating temperature -40°C to +70°C Conduction Cooled |
| TXMC638 | XMC | Reconfigurable FPGA with 24 x 16 bit Analog Input | TXMC638-10R: XC7K160T-2FBG676I (Xilinx) TXMC638-11R: XC7K325T-2FBG676I (Xilinx) TXMC638-12R: XC7K410T-2FBG676I (Xilinx) |
64 direct FPGA I/O lines to P14 Back I/O connector | 2 x 256M | – | Samtec ERF8-049-01-L-D-RA-L PMC P14 I/O XMC P16 I/O |
– | Operating temperature -40°C to +85°C |
| PMC-SLX | PMC | User Configurable Spartan-6 FPGA Modules with Plug-In I/O | FPGA / Spartan-6 | – | 256k x 64-bit dual-ported SRAM | – | – | – | Operating temperature -40°C to +85°C |
| PMC-VFX | PMC | User Configurable Virtex-5 FPGA Modules with Plug-In I/O | FPGA / Virtex-5 | – | 2 x 256Kb 32-bit dual-ported SRAM 2 x 64Mb 16-bit DDR2 SDRAM | LVDS and Plug-In I/O Modules, 71K logic cells | – | – | Operating temperature 0°C to +70°C |
| PMC-VLX | PMC | User Configurable Virtex-5 FPGA Modules with Plug-In I/O | FPGA / Virtex-5 | – | 2 x 256Kb 32-bit dual-ported SRAM | 64 LVDS I/O and Plug-In I/O Modules, up to 155K logic cells | – | – | Operating temperature 0°C to +70°C |
| PMC-VSX | PMC | User Configurable Virtex-5 FPGA Modules with Plug-In I/O | FPGA / Virtex-5 | – | 2 x 256Kb 32-bit dual-ported SRAM 2 x 32Mb 16-bit DDR2 SDRAM | LVDS I/O and Plug-In I/O Modules, 94K logic cells | – | – | Operating temperature 0°C to +70°C |
| PMC-LX | PMC | User Configurable Virtex-4 FPGA Modules with plug-in I/O | FPGA / Virtex-4 | – | 1 x 256K x 36-bit dual-ported SRAM 1 x 32Mb x 32-bit DDR DRAM | LVDS I/O and Plug-In I/O Modules, 64K logic cells | – | – | Operating temperature 0°C to +70°C Conduction Cooled |
| PMC-SX | PMC | User Configurable Virtex-4 FPGA Modules with plug-in I/O | FPGA / Virtex-4 | – | 1 x 256K x 36-bit dual-ported SRAM 1 x 32Mb x 32-bit DDR DRAM | 64 LVDS I/O and Plug-In I/O Modules, 34K logic cells | – | – | Operating temperature 0°C to +70°C Conduction Cooled |
| P599 | PMC | Main module for integration of userdefined I/O | FPGA / Nios | Depending on IP core and USM configuration | 32MB SDRAM 2MB Flash | Based on USM Universal Submodule concept | 1x 50-pin SCSI | Depending on USM | Operating temperature -40°C to +85°C |
| XMC-SLX | XMC | User Configurable Spartan-6 FPGA Modules with Plug-In I/O | FPGA / Spartan-6 | Digital I/O available via P4 rear connector. Analog and digital I/O Available via AXM modules as front panel I/O. | 256k x 64-bit dual-ported SRAM | 147,433 logic cells (XC6SLX 150) | – | – | Operating temperature -40°C to +85°C Conduction Cooled |
| XMC-VLX | XMC | User Configurable Virtex-5 FPGA Modules with Plug-In I/O | FPGA / VIrtex-5 | Digital I/O available via P4 rear connector. Analog and digital I/O Available via AXM modules as front panel I/O. | 1M x 64-bit dual-ported SRAM 32M x 32-bit DDR2 SDRAM | 82,944 logic cells (XC5VLX 85T) 110,592 logic cells (XMC-VLX 110) | – | – | Operating temperature 0°C to +70°C Conduction Cooled |
| XMC-6VLX | XMC | User Configurable Virtex-6 FPGA Modules with PCIe and SRIO/Aurora Interface | FPGA / VIrtex-6 | Digital I/O available via P4 rear connector. HS serial and digital I/O Available via the front panel SFP connectors. | 2M x 72-bit QDRII SRAM 128M x 64-bit DDR3 SDRAM | 240k logic cells (XC6VLX 240) 365k logic cells (XC6VLX 365) | Two x1 lanes via SFP connectors for Gigabit Ethernet and Fibre Channel interface | – | Operating temperature 0°C to +70°C |